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FPGA : Pile/cache d'envoi

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Geoffrey Frogeye 2018-02-26 18:47:33 +01:00
parent 81a7fd8bd7
commit d0e5842ca4
4 changed files with 123 additions and 40 deletions
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5
fpga/Makefile
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@ -175,7 +175,10 @@ build/%_tb: build/%_tb.o $(addprefix build/,$(subst .vhd,.o,$(VHDSOURCE)))
build/%_tb.vcd: build/%_tb
(cd "$(shell dirname "$<")"; ghdl -r "$(basename $(notdir $<))" --vcd="../$@" )
%_wave: build/%_tb.vcd
build/%_tb.ghw: build/%_tb
(cd "$(shell dirname "$<")"; ghdl -r "$(basename $(notdir $<))" --wave="../$@" )
%_wave: build/%_tb.ghw
gtkwave --save "$(notdir $(basename $<)).gtkw" "$<"
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