1
0
Fork 0
mirror of https://github.com/RobotechLille/cdf2018-principal synced 2024-11-14 12:26:06 +01:00

115200 baud

This commit is contained in:
Geoffrey Frogeye 2018-05-01 15:13:24 +02:00
parent 69ceaba85e
commit ec5867fa12
2 changed files with 2 additions and 2 deletions

View file

@ -9,7 +9,7 @@
#include "CFsignals.h"
#define FPGA_PORTNAME "/dev/ttyUSB0"
#define CF_BAUDRATE B9600
#define CF_BAUDRATE B115200
// #define PRINTRAWDATA
int fpga;

View file

@ -6,7 +6,7 @@ use IEEE.NUMERIC_STD.ALL;
entity Principal is
Generic(
fFpga : INTEGER := 50_000_000;
fBaud : INTEGER := 9600
fBaud : INTEGER := 115200
);
Port (
CLK : in std_logic;