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cdf2018-principal/fpga/project.cfg

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INI

PROJECT = Principal
TARGET_PART = xc3s200a-vq100
XILINX = /opt/Xilinx/14.7/ISE_DS/ISE
PROGRAMMER = mercpcl
TOPLEVEL = Principal
# Prod
VHDSOURCE = $(TOPLEVEL).vhd communication.vhd uart.vhd hedm.vhd hcsr04.vhd fir.vhd pwm.vhd
CONSTRAINTS = principal.ucf