.equ PINA = 0x00 ; définition des adresses des ports
.equ DDRA = 0x01
.equ PORTA = 0x02
.equ PINC = 0x06
.equ DDRC = 0x07
.equ PORTC = 0x08

.equ RAMEND = 0x21FF
.equ SPH = 0x3E ; initialisation de la pile
.equ SPL = 0x3D
.equ SREG = 0x3F

.equ TCCR0A = 0x24
.equ TCCR0B = 0x25
.equ TIMSK0 = 0x6E
.equ TIFR0 = 0x35

.equ ADMUX = 0x7C
.equ ADCSRB = 0x7B
.equ ADCSRA = 0x7A
.equ ADCH = 0x79
.equ ADCL = 0x78

.def d2 = r19
.def d1 = r20
.def d0 = r21
.def select = r22
.def temp = r23

.org 0x000
    ; Vecteur RESET
    jmp debut

.org 0x002E ; Interruption du timer
	jmp tm

.org 0x003A
	jmp irqadc

.org 0x0080

codeAff:
	.db 0b1111110, 0b001100
	.db 0b0110111, 0b0011111
	.db 0b1001101, 0b1011011
	.db 0b1111011, 0b0001110
	.db 0b1111111, 0b1011111

debut:
	ldi r28, low(RAMEND)
	ldi r29, high(RAMEND)
	
	out SPL, r28
	out SPH, r29
	
	cli
	DDRA@IO <- 0xFF
	DDRC@IO <- 0xFF
	
	ADMUX <- 0b01100001
	ADCSRB <- 0b00000000
	ADCSRA <- 0b11101111
	
	; Timer toutes les 2 ms
	TCCR0A@IO <- 0x00
	TCCR0B@IO <- 0x04
	TIMSK0 <- 0x01
	TIFR0 <- 0x01
	
	sei
	
	d2 <- 1
	d1 <- 2
	d0 <- 3
	select <- 0b00100000
	
boucle:
	sleep
	jmp boucle


irqadc:
	temp <- ADCH
	d2 <- temp / 100
	d1 <- temp / 10 - (temp / 100) * 10
	d0 <- temp - temp/10*10
	reti
	
tm:
	PortC@IO <- select
	si select = 0b10000000 alors PortA@IO <- codeAff@ROM[d2]
	si select = 0b01000000 alors PortA@IO <- codeAff@ROM[d1]
	si select = 0b00100000 alors PortA@IO <- codeAff@ROM[d0]
	lsl select
	si select = 0 alors select <- 0b00100000
	reti