151 lines
2.4 KiB
NASM
151 lines
2.4 KiB
NASM
.equ PINA = 0x00 ; définition des adresses des ports
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.equ DDRA = 0x01
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.equ PORTA = 0x02
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.equ PINB = 0x03
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.equ DDRB = 0x04
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.equ PORTB = 0x05
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.equ RAMEND = 0x21FF
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.equ SPH = 0x3E ; initialisation de la pile
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.equ SPL = 0x3D
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.equ SREG = 0x3F
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.equ ADMUX = 0x7C
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.equ ADCSRB = 0x7B
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.equ ADCSRA = 0x7A
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.equ ADCH = 0x79
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.equ ADCL = 0x78
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.def temp = r20
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.def consigne = r21
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.org 0x000
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; Vecteur RESET
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jmp debut
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.org 0x0080
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codeAff:
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.db 0b1111110, 0b001100
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.db 0b0110111, 0b0011111
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.db 0b1001101, 0b1011011
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.db 0b1111011, 0b0001110
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.db 0b1111111, 0b1011111
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debut:
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ldi r28, low(RAMEND)
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ldi r29, high(RAMEND)
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out SPL, r28
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out SPH, r29
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; DDRA@IO <- 0b01111111
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LDI R16,0b01111111
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OUT DDRA,R16
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; DDRB@IO <- 0xFF
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LDI R16,0xFF
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OUT DDRB,R16
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; ADCSRB <- 0b00000000
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LDI R16,0b00000000
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STS ADCSRB,R16
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boucle:
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; ADMUX <- 0b01100000
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LDI R16,0b01100000
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STS ADMUX,R16
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; ADCSRA <- 0b11100111
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LDI R16,0b11100111
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STS ADCSRA,R16
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;ADCSRB <- 0b01000010
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attente1:
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; si (ADCSRA & 0b00010000) = 0 saut attente1
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LDS R16,ADCSRA
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ANDI R16,0b00010000
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PUSH R16
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LDI R16,0
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POP R17
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CP R17,R16
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BREQ eti0
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CLR R16
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RJMP eti1
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eti0:
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LDI R16,0x01
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eti1:
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TST R16
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BREQ eti2
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JMP attente1
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eti2:
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; r5 <- ADCH
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LDS R16,ADCH
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MOV R5,R16
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;ADCSRA <- ADCSRA & 0b11101111
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;consigne <- ADCH / 8 + 20
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;si (PORTA@IO & 0b10000000) = 0 alors consigne <- 12
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; ADMUX <- 0b01100001
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LDI R16,0b01100001
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STS ADMUX,R16
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; ADCSRA <- 0b11100111
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LDI R16,0b11100111
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STS ADCSRA,R16
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;ADCSRB <- 0b01000010
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attente2:
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; si (ADCSRA & 0b00010000) = 0 saut attente2
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LDS R16,ADCSRA
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ANDI R16,0b00010000
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PUSH R16
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LDI R16,0
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POP R17
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CP R17,R16
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BREQ eti3
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CLR R16
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RJMP eti4
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eti3:
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LDI R16,0x01
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eti4:
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TST R16
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BREQ eti5
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JMP attente2
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eti5:
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; r6 <- ADCH
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LDS R16,ADCH
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MOV R6,R16
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;ADCSRA <- ADCSRA & 0b11101111
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;temp <- ADCH / 4
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;PORTA@IO <- codeAff@ROM[temp/20]
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;PORTB@IO <- codeAff@ROM[temp-(temp/20)*20]
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;si consigne - 1 > temp alors PORTB@IO <- PORTB@IO | 0b10000000
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;si consigne + 1 < temp alors PORTB@IO <- PORTB@IO & 0b01111111
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;PORTB@IO <- PORTB@IO | 0b10000000
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jmp boucle
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