283 lines
4.3 KiB
NASM
283 lines
4.3 KiB
NASM
.equ PINA = 0x00 ; définition des adresses des ports
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.equ DDRA = 0x01
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.equ PORTA = 0x02
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.equ PINC = 0x06
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.equ DDRC = 0x07
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.equ PORTC = 0x08
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.equ RAMEND = 0x21FF
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.equ SPH = 0x3E ; initialisation de la pile
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.equ SPL = 0x3D
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.equ SREG = 0x3F
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.equ TCCR0A = 0x24
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.equ TCCR0B = 0x25
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.equ TIMSK0 = 0x6E
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.equ TIFR0 = 0x35
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.equ ADMUX = 0x7C
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.equ ADCSRB = 0x7B
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.equ ADCSRA = 0x7A
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.equ ADCH = 0x79
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.equ ADCL = 0x78
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.def d2 = r19
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.def d1 = r20
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.def d0 = r21
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.def select = r22
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.def temp = r23
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.org 0x000
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; Vecteur RESET
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jmp debut
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.org 0x002E ; Interruption du timer
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jmp tm
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.org 0x003A
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jmp irqadc
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.org 0x0080
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codeAff:
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.db 0b1111110, 0b001100
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.db 0b0110111, 0b0011111
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.db 0b1001101, 0b1011011
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.db 0b1111011, 0b0001110
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.db 0b1111111, 0b1011111
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debut:
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ldi r28, low(RAMEND)
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ldi r29, high(RAMEND)
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out SPL, r28
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out SPH, r29
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cli
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; DDRA@IO <- 0xFF
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LDI R16,0xFF
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OUT DDRA,R16
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; DDRC@IO <- 0xFF
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LDI R16,0xFF
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OUT DDRC,R16
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; ADMUX <- 0b01100001
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LDI R16,0b01100001
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STS ADMUX,R16
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; ADCSRB <- 0b00000000
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LDI R16,0b00000000
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STS ADCSRB,R16
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; ADCSRA <- 0b11101111
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LDI R16,0b11101111
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STS ADCSRA,R16
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; Timer toutes les 2 ms
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; TCCR0A@IO <- 0x00
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LDI R16,0x00
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OUT TCCR0A,R16
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; TCCR0B@IO <- 0x04
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LDI R16,0x04
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OUT TCCR0B,R16
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; TIMSK0 <- 0x01
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LDI R16,0x01
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STS TIMSK0,R16
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; TIFR0 <- 0x01
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LDI R16,0x01
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STS TIFR0,R16
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sei
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; d2 <- 1
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LDI R16,1
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STS d2,R16
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; d1 <- 2
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LDI R16,2
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STS d1,R16
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; d0 <- 3
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LDI R16,3
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STS d0,R16
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; select <- 0b00100000
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LDI R16,0b00100000
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STS select,R16
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boucle:
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sleep
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jmp boucle
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irqadc:
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; temp <- ADCH
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LDS R16,ADCH
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STS temp,R16
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; d2 <- temp / 100
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LDS R16,temp
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LDI R17,100
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SER R18
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eti0:
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INC R18
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SUB R16,R17
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BRCC eti0
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MOV R16,R18
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STS d2,R16
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; d1 <- temp / 10 - (temp / 100) * 10
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LDS R16,temp
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LDI R17,10
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SER R18
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eti1:
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INC R18
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SUB R16,R17
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BRCC eti1
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MOV R16,R18
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PUSH R16
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LDS R16,temp
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LDI R17,100
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SER R18
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eti2:
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INC R18
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SUB R16,R17
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BRCC eti2
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MOV R16,R18
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LDI R17,10
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MUL R16,R17
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MOV R16,R0
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MOV R17,R16
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POP R16
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SUB R16,R17
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STS d1,R16
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; d0 <- temp - temp/10*10
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LDS R16,temp
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PUSH R16
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LDS R16,temp
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LDI R17,10
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SER R18
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eti3:
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INC R18
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SUB R16,R17
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BRCC eti3
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MOV R16,R18
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LDI R17,10
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MUL R16,R17
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MOV R16,R0
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MOV R17,R16
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POP R16
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SUB R16,R17
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STS d0,R16
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reti
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tm:
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; PortC@IO <- select
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LDS R16,select
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OUT PortC,R16
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; si select = 0b10000000 alors PortA@IO <- codeAff@ROM[d2]
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LDS R16,select
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PUSH R16
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LDI R16,0b10000000
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POP R17
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CP R17,R16
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BREQ eti4
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CLR R16
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RJMP eti5
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eti4:
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LDI R16,0x01
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eti5:
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TST R16
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BREQ eti6
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LDS R16,d2
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LDI R30,low(codeAff<<1)
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LDI R31,high(codeAff<<1)
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CLR R17
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ADD R30,R16
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ADC R31,R17
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LPM R16,Z
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OUT PortA,R16
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eti6:
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; si select = 0b01000000 alors PortA@IO <- codeAff@ROM[d1]
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LDS R16,select
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PUSH R16
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LDI R16,0b01000000
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POP R17
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CP R17,R16
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BREQ eti7
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CLR R16
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RJMP eti8
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eti7:
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LDI R16,0x01
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eti8:
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TST R16
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BREQ eti9
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LDS R16,d1
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LDI R30,low(codeAff<<1)
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LDI R31,high(codeAff<<1)
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CLR R17
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ADD R30,R16
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ADC R31,R17
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LPM R16,Z
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OUT PortA,R16
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eti9:
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; si select = 0b00100000 alors PortA@IO <- codeAff@ROM[d0]
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LDS R16,select
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PUSH R16
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LDI R16,0b00100000
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POP R17
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CP R17,R16
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BREQ eti10
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CLR R16
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RJMP eti11
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eti10:
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LDI R16,0x01
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eti11:
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TST R16
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BREQ eti12
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LDS R16,d0
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LDI R30,low(codeAff<<1)
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LDI R31,high(codeAff<<1)
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CLR R17
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ADD R30,R16
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ADC R31,R17
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LPM R16,Z
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OUT PortA,R16
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eti12:
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lsl select
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; si select = 0 alors select <- 0b00100000
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LDS R16,select
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PUSH R16
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LDI R16,0
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POP R17
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CP R17,R16
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BREQ eti13
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CLR R16
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RJMP eti14
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eti13:
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LDI R16,0x01
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eti14:
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TST R16
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BREQ eti15
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LDI R16,0b00100000
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STS select,R16
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eti15:
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reti
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