2018-02-07 17:57:01 +01:00
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PROJECT = Principal
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TARGET_PART = xc3s200a-vq100
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XILINX = /opt/Xilinx/14.7/ISE_DS/ISE
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PROGRAMMER = mercpcl
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TOPLEVEL = Principal
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2018-02-21 16:58:43 +01:00
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# Prod
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# VHDSOURCE = $(TOPLEVEL).vhd uart.vhd
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# CONSTRAINTS = mercury.ucf
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# Debug
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2018-02-24 18:16:09 +01:00
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VHDSOURCE = $(TOPLEVEL).vhd $(filter-out %_tb.vhd,$(wildcard *.vhd))
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2018-02-21 16:58:43 +01:00
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CONSTRAINTS = debug.ucf
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2018-02-07 17:57:01 +01:00
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# Implement design
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# Allow unmatched LOC Constraints
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NGDBUILD_OPTS += -aul
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# Allow unmatched Timing Group Constraints
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NGDBUILD_OPTS += -aut
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