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cdf2018-principal/fpga/project.cfg
2018-02-07 17:57:01 +01:00

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INI

PROJECT = Principal
TARGET_PART = xc3s200a-vq100
XILINX = /opt/Xilinx/14.7/ISE_DS/ISE
PROGRAMMER = mercpcl
TOPLEVEL = Principal
VHDSOURCE = $(TOPLEVEL).vhd
CONSTRAINTS = mercury.ucf
# Implement design
# Allow unmatched LOC Constraints
NGDBUILD_OPTS += -aul
# Allow unmatched Timing Group Constraints
NGDBUILD_OPTS += -aut