mirror of
https://github.com/RobotechLille/cdf2018-principal
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91 lines
3.6 KiB
Plaintext
91 lines
3.6 KiB
Plaintext
# __ ____ _ __
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# / |/ (_)_____________ / | / /___ _ ______ _
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# / /|_/ / / ___/ ___/ __ \/ |/ / __ \ | / / __ `/
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# / / / / / /__/ / / /_/ / /| / /_/ / |/ / /_/ /
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# /_/ /_/_/\___/_/ \____/_/ |_/\____/|___/\__,_/
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#
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# Mercury User Constraints File
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# Revision 1.0.142 (10/24/2012)
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# Copyright (c) 2012 MicroNova, LLC
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# www.micro-nova.com
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# system oscillator
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NET "CLK" LOC = "P43" | IOSTANDARD = LVTTL ;
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NET "CLK" TNM_NET = "CLK";
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TIMESPEC "TS_CLK" = PERIOD "CLK" 20 ns HIGH 50 %;
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# user LEDs and button
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NET "LED<0>" LOC = "P13" | IOSTANDARD = LVTTL ;
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NET "LED<1>" LOC = "P15" | IOSTANDARD = LVTTL ;
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NET "LED<2>" LOC = "P16" | IOSTANDARD = LVTTL ;
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NET "LED<3>" LOC = "P19" | IOSTANDARD = LVTTL ;
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NET "BTN" LOC = "P41" | IOSTANDARD = LVTTL ;
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# direct and global-clock I/O
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NET "DIO<0>" LOC = "P20" | IOSTANDARD = LVTTL ;
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NET "DIO<1>" LOC = "P32" | IOSTANDARD = LVTTL ;
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NET "DIO<2>" LOC = "P33" | IOSTANDARD = LVTTL ;
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NET "DIO<3>" LOC = "P34" | IOSTANDARD = LVTTL ;
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NET "DIO<4>" LOC = "P35" | IOSTANDARD = LVTTL ;
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NET "DIO<5>" LOC = "P36" | IOSTANDARD = LVTTL ;
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NET "DIO<6>" LOC = "P37" | IOSTANDARD = LVTTL ;
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NET "CIO<0>" LOC = "P40" | IOSTANDARD = LVTTL ;
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NET "CIO<1>" LOC = "P44" | IOSTANDARD = LVTTL ;
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# in-only pins
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NET "INPIN<0>" LOC = "P68" | IOSTANDARD = LVTTL ;
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NET "INPIN<1>" LOC = "P97" | IOSTANDARD = LVTTL ;
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NET "INPIN<2>" LOC = "P7" | IOSTANDARD = LVTTL ;
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NET "INPIN<3>" LOC = "P82" | IOSTANDARD = LVTTL ;
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# level-shifted I/O
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NET "IO<0>" LOC = "P59" | IOSTANDARD = LVTTL ;
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NET "IO<1>" LOC = "P60" | IOSTANDARD = LVTTL ;
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NET "IO<2>" LOC = "P61" | IOSTANDARD = LVTTL ;
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NET "IO<3>" LOC = "P62" | IOSTANDARD = LVTTL ;
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NET "IO<4>" LOC = "P64" | IOSTANDARD = LVTTL ;
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NET "IO<5>" LOC = "P57" | IOSTANDARD = LVTTL ;
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NET "IO<6>" LOC = "P56" | IOSTANDARD = LVTTL ;
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NET "IO<7>" LOC = "P52" | IOSTANDARD = LVTTL ;
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NET "IO<8>" LOC = "P50" | IOSTANDARD = LVTTL ;
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NET "IO<9>" LOC = "P49" | IOSTANDARD = LVTTL ;
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NET "IO<10>" LOC = "P85" | IOSTANDARD = LVTTL ;
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NET "IO<11>" LOC = "P84" | IOSTANDARD = LVTTL ;
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NET "IO<12>" LOC = "P83" | IOSTANDARD = LVTTL ;
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NET "IO<13>" LOC = "P78" | IOSTANDARD = LVTTL ;
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NET "IO<14>" LOC = "P77" | IOSTANDARD = LVTTL ;
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NET "IO<15>" LOC = "P65" | IOSTANDARD = LVTTL ;
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NET "IO<16>" LOC = "P70" | IOSTANDARD = LVTTL ;
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NET "IO<17>" LOC = "P71" | IOSTANDARD = LVTTL ;
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NET "IO<18>" LOC = "P72" | IOSTANDARD = LVTTL ;
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NET "IO<19>" LOC = "P73" | IOSTANDARD = LVTTL ;
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NET "IO<20>" LOC = "P5" | IOSTANDARD = LVTTL ;
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NET "IO<21>" LOC = "P4" | IOSTANDARD = LVTTL ;
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NET "IO<22>" LOC = "P6" | IOSTANDARD = LVTTL ;
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NET "IO<23>" LOC = "P98" | IOSTANDARD = LVTTL ;
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NET "IO<24>" LOC = "P94" | IOSTANDARD = LVTTL ;
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NET "IO<25>" LOC = "P93" | IOSTANDARD = LVTTL ;
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NET "IO<26>" LOC = "P90" | IOSTANDARD = LVTTL ;
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NET "IO<27>" LOC = "P89" | IOSTANDARD = LVTTL ;
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NET "IO<28>" LOC = "P88" | IOSTANDARD = LVTTL ;
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NET "IO<29>" LOC = "P86" | IOSTANDARD = LVTTL ;
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# memory & bus-switch
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NET "switch_oen" LOC = "P3" | IOSTANDARD = LVTTL ;
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NET "memory_oen" LOC = "P30" | IOSTANDARD = LVTTL ;
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# flash/usb interface
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NET "fpga_csn" LOC = "P39" | IOSTANDARD = LVTTL ;
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NET "flash_csn" LOC = "P27" | IOSTANDARD = LVTTL ;
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NET "spi_mosi" LOC = "P46" | IOSTANDARD = LVTTL ;
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NET "spi_miso" LOC = "P51" | IOSTANDARD = LVTTL ;
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NET "spi_sck" LOC = "P53" | IOSTANDARD = LVTTL ;
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# ADC interface
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NET "adc_miso" LOC = "P21" | IOSTANDARD = LVTTL ;
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NET "adc_mosi" LOC = "P10" | IOSTANDARD = LVTTL ;
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NET "adc_sck" LOC = "P9" | IOSTANDARD = LVTTL ;
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NET "adc_csn" LOC = "P12" | IOSTANDARD = LVTTL ;
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# CLOCK timing
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